In mission-critical computer systems, multiplexed (redundant) I/O paths to an I/O device, such as a storage system, are used in order to improve the reliability. Furthermore, among recent computer systems, a system in which a host computer and an I/O device are connected by using a PCI/PCIe-bus expansion card has been put into practical use. Regarding the multiplexing of an I/O path, for example, Japanese Unexamined Patent Application Publication Nos. 2004-185093 and 2007-265243 disclose technologies in which multiplexing an I/O path to a storage system improves the input-output performance, and, when a failure occurs, a normal logical path is selected to access a logical unit in the storage system.
Furthermore, in recent years, the speed of host bus adaptors (hereinafter, referred to as HBAs) in I/O paths in computer systems has been increased. This increase in speed can be realized by making the I/O paths redundant, but the redundant I/O paths may implement a higher performance than the required input-output performance. In such a case, it is desirable from the standpoint of power saving that only the devices in the minimum necessary I/O path (operational path) be operated in order to attain the required input-output performance, and the devices in the spare I/O path (standby path) be stopped.
However, to activate a device that has been stopped, for example, a host bus adaptor, a start time of several seconds to several tens of seconds is required to switch from the stopped state to a state in which communication can be performed. Thus, in the mission-critical computer systems, the technique in which the devices in the standby path are stopped cannot be used. In the mission-critical computer systems, if communication via the operational path cannot be performed, it is required that the communication be immediately continued via the standby path, and thus, a start time of several seconds to several tens of seconds is unacceptable.
Regarding power saving control for the standby path, Japanese Unexamined Patent Application Publication No. 2010-198353 discloses a computer system that includes a power supply control section for controlling power supply to HBAs connected to a plurality of paths. In the computer system, when the occurrence of an error with respect to a reissued I/O is detected, the standby path and the currently-being-used path are switched, and when a notification of time-out is received, the power supply control section stops power supply to the HBA in the standby path.
Furthermore, Japanese Unexamined Patent Application Publication No. 2009-289193 discloses a technology of reducing the power consumption of a device connected to a PCI/PCIe bus, by using the PCI PM (power management) function.
Furthermore, PCI Bus Power Management Interface Specification Rev. 1.2 Mar. 3, 2004 prescribes a PM function (power management function) serving as a power saving function for PCI/PCIe-bus expansion cards.
In the technology of Japanese Unexamined Patent Application Publication No. 2010-198353, the power supply control section, which controls power supply to the HBAs, performs power saving control for the standby path. However, many of computer systems that have been put into practical use do not include this type of power supply control section, so that it is difficult to immediately apply this technology thereto. In particular, Japanese Unexamined Patent Application Publication No. 2010-198353 does not suggest how power saving control for the standby path in a computer system that uses PCI/PCIe-bus expansion cards having the PCI PM function is performed.
Furthermore, Japanese Unexamined Patent Application Publication No. 2009-289193 proposes the technology of reducing the power consumption of a device connected to the PCI/PCIe bus, by using the PCI PM function. However, it does not suggest how the technology is applied to a computer system in which an HBA connected to the PCI/PCIe bus is used made redundant.